Teach リモートラボを使うレッスン

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LabsLand Teach レッスン

公開中のリモートラボ・アクティビティを授業で活用できます。

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448 件のレッスン

448 件の公開レッスンが利用可能

Water Heating and Cooling Curves
  • Water Heating and Cooling Curves
  • 30 min
  • Ages 11–13
  • English

Did the thermometer get stuck?

A 26-minute science mission on the core route, or about 31 minutes with the optional graph: use a real run to investigate why a thermometer's reading barely changes while ice is being heated.

  • Use a low-heat run in the remote laboratory and observe its two cameras.
  • Put four moments of the process in order and recognise how the state and amount of ice change.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 50 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC (1/6): Your first gates on real hardware

Students write Verilog for basic logic gates, synthesize and upload to the DE1-SoC, and verify truth tables on real switches and LEDs.

  • Explain that Verilog describes hardware, not a program that runs step by step.
  • Use the LabsLand DE1-SoC Verilog workflow: edit, Synthesize, Upload, observe.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 70 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC (2/6): Truth tables, SOP/POS, K-maps, and a multiplexer

Students connect truth tables, Boolean forms, Karnaugh maps, and multiplexers, then test minimized combinational logic on DE1-SoC hardware.

  • Derive the sum-of-products (SOP) and product-of-sums (POS; optional extension) forms from a truth table.
  • Minimize a Boolean function with a Karnaugh map and read off the simplified expression.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 55 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC (3/6): Memory — flip-flops and registers

Students build D flip-flop and register circuits in Verilog, test clock and reset behavior, and distinguish combinational logic from stored state.

  • Explain why sequential logic needs memory while combinational logic does not.
  • Describe a D flip-flop as sample-and-hold on the clock edge, with synchronous reset.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 65 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC (4/6): Counters and shift registers

Students implement counters and shift registers in Verilog, observe sequential LED patterns, and explain clocked updates on hardware.

  • Explain what a clock divider does and use it to make 50 MHz behavior visible to the eye and camera.
  • Build a 4-bit counter and read its value on the LEDs and on a 7-segment display.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 70 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC (5/6): Finite state machines

Students design a finite-state machine for traffic-light-style output, synthesize it, and verify state transitions on the DE1-SoC.

  • Explain what a finite state machine is in terms of states, transitions, and outputs.
  • Distinguish Moore machines (outputs from state) from Mealy machines (outputs from state and inputs).

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 75 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC (6/6): FSM capstone — a vending machine

Students synthesize and upload a Verilog vending-machine FSM to the DE1-SoC, then test switch inputs, KEY reset, LEDR dispense, and HEX credit output.

  • Design and extend a non-trivial finite state machine on real hardware.
  • Build a vending-machine controller whose state is the accumulated credit.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 50 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC with VHDL (1/6): Your first gates on real hardware

Students write VHDL for basic logic gates, synthesize and upload to the DE1-SoC, and verify truth tables on real switches and LEDs.

  • Explain that VHDL describes hardware, not a program that runs step by step.
  • Use the LabsLand DE1-SoC VHDL workflow: edit, Synthesize, Upload, observe.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 45 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC with VHDL (2/6): Truth tables, SOP, K-maps, and optional extensions

Students implement a Boolean function in VHDL as a canonical SOP, minimize it with a K-map, and try optional POS/MUX extensions on the DE1-SoC if time permits.

  • Derive a canonical sum-of-products (SOP) form from a truth table.
  • Minimize a Boolean function with a Karnaugh map and read off the simplified expression.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 55 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC with VHDL (3/6): Memory -- flip-flops and registers

Students use VHDL clocked processes to build a D flip-flop and an 8-bit register, then verify memory behavior on real hardware.

  • Explain why sequential logic needs memory while combinational logic does not.
  • Describe a D flip-flop as sample-and-hold on the clock edge, with synchronous reset.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 40 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC with VHDL (4/6): Counters and optional shift registers

Students build a VHDL counter and clock divider, then try optional BCD and shift-register extensions if time permits.

  • Explain what a clock divider does and use it to make 50 MHz behavior visible to the eye and camera.
  • Build a 4-bit counter and read its value on the LEDs and on a 7-segment display.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 45 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC with VHDL (5/6): Finite state machines

Students build and modify a Moore traffic-light FSM on the DE1-SoC, with an optional Mealy detector extension.

  • Explain what a finite state machine is in terms of states, transitions, and outputs.
  • Explain why the traffic-light controller is a Moore machine, and recognize a Mealy detector as an optional extension.

生徒向けの質問と回答欄が含まれます。

Altera DE1-SoC
  • Altera DE1-SoC
  • 45 min
  • Undergraduate, introductory
  • English

Digital Logic on the DE1-SoC with VHDL (6/6): FSM capstone -- a vending machine

Students build a VHDL vending-machine FSM, test credit paths on hardware, and try optional change-return checkpoints if time permits.

  • Run and explain a non-trivial finite state machine on real hardware.
  • Build a vending-machine controller whose state is the accumulated credit.

生徒向けの質問と回答欄が含まれます。

Thermal Expansion
  • Thermal Expansion
  • 55 min
  • Física / Química do Ensino Médio
  • Português (Brasil)

Dilatação térmica: comparação de metais com evidências reais em vídeo

Os estudantes usam o laboratório remoto de Dilatação Térmica para comparar alumínio, cobre e latão e, em seguida, distinguem observações diretas de afirmações baseadas em um modelo.

  • Usar o modelo de dilatação linear para prever como os materiais devem se comparar.
  • Usar o laboratório remoto para observar pelo menos dois ensaios com materiais diferentes.

生徒向けの質問と回答欄が含まれます。

Boyle's Law
  • Boyle's Law
  • 40 min
  • Ciências no ensino médio
  • Português (Brasil)

Dois ensaios de Boyle concordam?

Compare dois ensaios reais de Boyle em volumes correspondentes e decida o que a repetibilidade nos informa e o que ela não informa.

  • Coletar leituras correspondentes de dois ensaios pré-gravados de 60 mL.
  • Calcular diferenças absolutas e percentuais em três volumes correspondentes.

生徒向けの質問と回答欄が含まれます。

Valora. Ácido-Base II
  • Valora. Ácido-Base II
  • 30 min
  • Secundaria (12–13 años)
  • Español

El reto del rosa perfecto

Una misión de 25–35 minutos para usar una alarma química y detener una titulación con evidencia visual.

  • Explicar por qué el aspecto de un líquido no basta para conocer sus propiedades químicas.
  • Usar el cambio de color de un indicador como señal para detener el goteo.

生徒向けの質問と回答欄が含まれます。

Electronics - Hive
  • Electronics - Hive
  • 30 min
  • First-year university / introductory vocational electronics / upper-secondary electronics
  • English

Electronics Lab Essentials (1/7): read a breadboard before wiring

Students learn how breadboard holes form electrical nodes, trace a complete path, and confirm their interpretation with a real Hive resistance measurement.

  • Define an electrical node and identify connected breadboard holes.
  • Explain why the center trench separates the two terminal strips.

生徒向けの質問と回答欄が含まれます。

Electronics - Hive
  • Electronics - Hive
  • 30 min
  • First-year university / introductory vocational electronics / upper-secondary electronics
  • English

Electronics Lab Essentials (2/7): power a circuit with the correct reference

Students learn voltage, polarity, ground/reference, current limiting, and safe power-up habits by measuring two real Hive DC-supply settings.

  • Explain voltage as a difference between two points.
  • Identify positive output, negative output, ground/reference, polarity, and current limit.

生徒向けの質問と回答欄が含まれます。

Electronics - Hive
  • Electronics - Hive
  • 30 min
  • First-year university / introductory vocational electronics / upper-secondary electronics
  • English

Electronics Lab Essentials (3/7): measure resistance and voltage correctly

Students choose DMM resistance or DC-voltage mode, connect across the correct nodes, preserve the required powered state, and interpret units and signs.

  • Choose resistance or DC-voltage mode for a stated measurement.
  • Explain why resistance is normally measured on an unpowered circuit.

生徒向けの質問と回答欄が含まれます。

Electronics - Hive
  • Electronics - Hive
  • 30 min
  • First-year university / introductory vocational electronics / upper-secondary electronics
  • English

Electronics Lab Essentials (4/7): measure current without creating a short circuit

Students learn why an ammeter is inserted in series, predict and measure real DC current, convert A and mA, and apply a safe physical-meter sequence.

  • Explain why an ammeter is inserted in series rather than placed across a supply.
  • Predict current using Ohm's law and an equivalent resistance.

生徒向けの質問と回答欄が含まれます。

Electronics - Hive
  • Electronics - Hive
  • 30 min
  • First-year university / introductory vocational electronics / upper-secondary electronics
  • English

Electronics Lab Essentials (5/7): create a controlled test signal

Students learn waveform, frequency, period, peak-to-peak amplitude, offset, and reference by configuring and observing a real Hive function-generator signal.

  • Identify sine, square, and triangle waveforms.
  • Define frequency, period, peak-to-peak voltage, amplitude, and DC offset.

生徒向けの質問と回答欄が含まれます。