LabsLand Teach ikasgaiak

• Water Heating and Cooling Curves
• 30 min
• Ages 11–13
• English

Did the thermometer get stuck?

A 26-minute science mission on the core route, or about 31 minutes with the optional graph: use a real run to investigate why a thermometer's reading barely changes while ice is being heated.

• Use a low-heat run in the remote laboratory and observe its two cameras.
• Put four moments of the process in order and recognise how the state and amount of ice change.

Ikasleentzako galderak eta erantzun-eremuak ditu.

Ikusi ikasgaia Hasi saioa klase-saio bat sortzeko

• DE1-SoC
• 50 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC (1/6): Your first gates on real hardware

Students write Verilog for basic logic gates, synthesize and upload to the DE1-SoC, and verify truth tables on real switches and LEDs.

• Explain that Verilog describes hardware, not a program that runs step by step.
• Use the LabsLand DE1-SoC Verilog workflow: edit, Synthesize, Upload, observe.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• DE1-SoC
• 70 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC (2/6): Truth tables, SOP/POS, K-maps, and a multiplexer

Students connect truth tables, Boolean forms, Karnaugh maps, and multiplexers, then test minimized combinational logic on DE1-SoC hardware.

• Derive the sum-of-products (SOP) and product-of-sums (POS; optional extension) forms from a truth table.
• Minimize a Boolean function with a Karnaugh map and read off the simplified expression.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• DE1-SoC
• 55 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC (3/6): Memory — flip-flops and registers

Students build D flip-flop and register circuits in Verilog, test clock and reset behavior, and distinguish combinational logic from stored state.

• Explain why sequential logic needs memory while combinational logic does not.
• Describe a D flip-flop as sample-and-hold on the clock edge, with synchronous reset.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• DE1-SoC
• 65 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC (4/6): Counters and shift registers

Students implement counters and shift registers in Verilog, observe sequential LED patterns, and explain clocked updates on hardware.

• Explain what a clock divider does and use it to make 50 MHz behavior visible to the eye and camera.
• Build a 4-bit counter and read its value on the LEDs and on a 7-segment display.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• DE1-SoC
• 70 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC (5/6): Finite state machines

Students design a finite-state machine for traffic-light-style output, synthesize it, and verify state transitions on the DE1-SoC.

• Explain what a finite state machine is in terms of states, transitions, and outputs.
• Distinguish Moore machines (outputs from state) from Mealy machines (outputs from state and inputs).

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• DE1-SoC
• 75 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC (6/6): FSM capstone — a vending machine

Students synthesize and upload a Verilog vending-machine FSM to the DE1-SoC, then test switch inputs, KEY reset, LEDR dispense, and HEX credit output.

• Design and extend a non-trivial finite state machine on real hardware.
• Build a vending-machine controller whose state is the accumulated credit.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• DE1-SoC
• 50 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC with VHDL (1/6): Your first gates on real hardware

Students write VHDL for basic logic gates, synthesize and upload to the DE1-SoC, and verify truth tables on real switches and LEDs.

• Explain that VHDL describes hardware, not a program that runs step by step.
• Use the LabsLand DE1-SoC VHDL workflow: edit, Synthesize, Upload, observe.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• DE1-SoC
• 45 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC with VHDL (2/6): Truth tables, SOP, K-maps, and optional extensions

Students implement a Boolean function in VHDL as a canonical SOP, minimize it with a K-map, and try optional POS/MUX extensions on the DE1-SoC if time permits.

• Derive a canonical sum-of-products (SOP) form from a truth table.
• Minimize a Boolean function with a Karnaugh map and read off the simplified expression.

Ikasleentzako galderak eta erantzun-eremuak ditu.

Ikusi ikasgaia Hasi saioa klase-saio bat sortzeko

• DE1-SoC
• 55 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC with VHDL (3/6): Memory -- flip-flops and registers

Students use VHDL clocked processes to build a D flip-flop and an 8-bit register, then verify memory behavior on real hardware.

• Explain why sequential logic needs memory while combinational logic does not.
• Describe a D flip-flop as sample-and-hold on the clock edge, with synchronous reset.

Ikasleentzako galderak eta erantzun-eremuak ditu.

Ikusi ikasgaia Hasi saioa klase-saio bat sortzeko

• DE1-SoC
• 40 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC with VHDL (4/6): Counters and optional shift registers

Students build a VHDL counter and clock divider, then try optional BCD and shift-register extensions if time permits.

• Explain what a clock divider does and use it to make 50 MHz behavior visible to the eye and camera.
• Build a 4-bit counter and read its value on the LEDs and on a 7-segment display.

Ikasleentzako galderak eta erantzun-eremuak ditu.

Ikusi ikasgaia Hasi saioa klase-saio bat sortzeko

• DE1-SoC
• 45 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC with VHDL (5/6): Finite state machines

Students build and modify a Moore traffic-light FSM on the DE1-SoC, with an optional Mealy detector extension.

• Explain what a finite state machine is in terms of states, transitions, and outputs.
• Explain why the traffic-light controller is a Moore machine, and recognize a Mealy detector as an optional extension.

Ikasleentzako galderak eta erantzun-eremuak ditu.

Ikusi ikasgaia Hasi saioa klase-saio bat sortzeko

• DE1-SoC
• 45 min
• Undergraduate, introductory
• English

Digital Logic on the DE1-SoC with VHDL (6/6): FSM capstone -- a vending machine

Students build a VHDL vending-machine FSM, test credit paths on hardware, and try optional change-return checkpoints if time permits.

• Run and explain a non-trivial finite state machine on real hardware.
• Build a vending-machine controller whose state is the accumulated credit.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• Thermal Expansion
• 55 min
• Física / Química do Ensino Médio
• Português (Brasil)

Dilatação térmica: comparação de metais com evidências reais em vídeo

Os estudantes usam o laboratório remoto de Dilatação Térmica para comparar alumínio, cobre e latão e, em seguida, distinguem observações diretas de afirmações baseadas em um modelo.

• Usar o modelo de dilatação linear para prever como os materiais devem se comparar.
• Usar o laboratório remoto para observar pelo menos dois ensaios com materiais diferentes.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• Electronics - Hive
• 45 min
• Secondary, ages 14–16
• English

Do different LED colours behave alike?

Compare three LED colours using the same resistor and two supply settings.

• Compare electrical readings from three LED colours under matched nominal conditions.
• Estimate LED voltage from supply setting and measured resistor voltage, stating the limitation.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• Boyle's Law
• 40 min
• upper secondary science
• English

Do two Boyle runs agree?

Compare two real Boyle runs at matched volumes and decide what repeatability does—and does not—tell us.

• Collect matched readings from two prerecorded 60 mL trials.
• Calculate absolute and percentage differences at three matched volumes.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• Động học
• 15 min
• Cuối cấp tiểu học, 9–12 tuổi
• Tiếng Việt

Dốc nào giúp viên bi đến đích sớm hơn?

So sánh hai góc nghiêng bằng một viên bi thật và cùng một cảm biến ở đích.

• Đọc thời gian viên bi đi đến cùng một cảm biến ở hai góc nghiêng.
• Dùng hai thời gian để xác định lượt nào đến cảm biến đó sớm hơn.

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• Boyle's Law
• 40 min
• Ciências no ensino médio
• Português (Brasil)

Dois ensaios de Boyle concordam?

Compare dois ensaios reais de Boyle em volumes correspondentes e decida o que a repetibilidade nos informa e o que ela não informa.

• Coletar leituras correspondentes de dois ensaios pré-gravados de 60 mL.
• Calcular diferenças absolutas e percentuais em três volumes correspondentes.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• Elektronik - Hive
• 40 min
• Sekundarstufe, 14–16 Jahre
• de

Drei Leuchten, unabhängige Zweige

Untersuche, was in einem LED-Zweig passiert, wenn weitere Zweige dieselbe Versorgung nutzen.

• Die Stromstärke im grünen Zweig bei einem, zwei und drei parallelen Zweigen vergleichen.
• Die Unabhängigkeit der Zweige erklären und Zweigstrom vom Gesamtstrom unterscheiden.

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• Elektronica - Hive
• 40 min
• Voortgezet onderwijs, 14–16 jaar
• nl

Drie lampjes, onafhankelijke takken

Onderzoek wat er in één led-tak gebeurt wanneer andere takken dezelfde voeding gebruiken.

• De stroom in de groene tak vergelijken bij één, twee en drie parallelle takken.
• Takonafhankelijkheid uitleggen en takstroom van totale stroom onderscheiden.

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• Ley de Snell
• 32 min
• Secundaria (12–13 años)
• Español

El misterio de la pajita rota

Resuelve un misterio cotidiano comparando en el laboratorio remoto cómo atraviesa la luz el agua a 0° y a 60°.

• Predecir visualmente qué camino seguirá la luz al entrar en el agua.
• Comparar cualitativamente el rayo en agua a 0° y a 60°.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• Ley de Boyle
• 35 min
• Secundaria (14–16 años)
• Español

El reto de la constante PV

Usa cinco pares reales de presión y volumen para decidir si una regla de multiplicación resiste una compresión completa.

• Recoger cinco pares seleccionados de presión y volumen del ensayo de 60 mL.
• Calcular PV con unidades coherentes para cada par.

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• Valora. Ácido-Base II
• 30 min
• Secundaria (12–13 años)
• Español

El reto del rosa perfecto

Una misión de 25–35 minutos para usar una alarma química y detener una titulación con evidencia visual.

• Explicar por qué el aspecto de un líquido no basta para conocer sus propiedades químicas.
• Usar el cambio de color de un indicador como señal para detener el goteo.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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• Electronics - Hive
• 30 min
• First-year university / introductory vocational electronics / upper-secondary electronics
• English

Electronics Lab Essentials (1/7): read a breadboard before wiring

Students learn how breadboard holes form electrical nodes, trace a complete path, and confirm their interpretation with a real Hive resistance measurement.

• Define an electrical node and identify connected breadboard holes.
• Explain why the center trench separates the two terminal strips.

Ikasleentzako galderak eta erantzun-eremuak ditu.

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