Digital Logic on the DE1-SoC with VHDL (1/6): Your first gates on real hardware

Most programming you have seen runs on a processor: instructions execute one after another. In this course you will do something different. You will describe a digital circuit in a language called VHDL, and a real chip will be configured to become that circuit. There is no processor running your lines one by one — your description becomes actual wires and gates that all operate at once.

The chip is an FPGA (Field-Programmable Gate Array): an integrated circuit containing a large grid of logic blocks whose connections can be reconfigured. The board is a Terasic DE1-SoC with an Intel/Altera Cyclone V FPGA — the same board used in many university digital-design courses. You reach a real one through your browser with LabsLand: a server runs Intel Quartus to turn your VHDL into a configuration file, programs the physical board, and streams a live camera so you can see the real LEDs respond.

The board parts you will use in this course:

- SW(9 downto 0) — 10 slide switches you control on screen. A switch up is logic 1.
- KEY(3 downto 0) — 4 pushbuttons. These are active-low: a button reads 0 when pressed and 1 when released.
- CLOCK_50 — a 50 MHz clock signal (used from Lesson 3 on).
- LEDR(9 downto 0) — 10 red LEDs, with LEDR0 at the right end of the row and LEDR9 at the left. These are active-high: an LED lights when you drive it 1.
- HEX0–HEX5 — six 7-segment displays. These are active-low: a segment lights when you drive it 0.

The workflow (the same every lesson): the LabsLand VHDL editor opens with one file, blink.vhd, containing a top-level entity called blink. You will replace the contents of that file with the design for the exercise (always keeping the entity named blink), then click Synthesize, wait for it to finish, click Upload to FPGA, and use the on-screen switches while watching the camera. If a guided tour or help overlay covers the editor buttons, close or skip the tour before continuing.

A logic gate takes one or more binary inputs and produces a binary output. Six gates cover almost everything in this course. With inputs A and B:

Truth table for A, B:

- A=0, B=0 -> AND 0, OR 0, NOT A 1, NAND 1, NOR 1, XOR 0
- A=0, B=1 -> AND 0, OR 1, NOT A 1, NAND 1, NOR 0, XOR 1
- A=1, B=0 -> AND 0, OR 1, NOT A 0, NAND 1, NOR 0, XOR 1
- A=1, B=1 -> AND 1, OR 1, NOT A 0, NAND 0, NOR 0, XOR 0

In VHDL these gates are written with the logic operators and, or, not, and xor. The design below connects switch SW(0) to A, SW(1) to B, and sends each gate result to one LED. A concurrent signal assignment such as LEDR(0) <= A and B; means the output continuously follows that expression, just like a wire connected to gates.

-- Student starter: fill the TODO lines before synthesizing.
-- Lesson 1 - basic gates. Replace ALL contents of blink.vhd with this design.
library ieee;
use ieee.std_logic_1164.all;

entity blink is
    port (
        SW   : in  std_logic_vector(9 downto 0);  -- SW(0)=A, SW(1)=B
        LEDR : out std_logic_vector(9 downto 0)
    );
end entity blink;

architecture rtl of blink is
    signal A, B : std_logic;
begin
    A <= SW(0);
    B <= SW(1);

    LEDR(0) <= TODO_AND;          -- TODO: expression for AND
    LEDR(1) <= TODO_OR;           -- TODO: expression for OR
    LEDR(2) <= TODO_NOT_A;      -- TODO: expression for NOT A
    LEDR(3) <= TODO_NAND;        -- TODO: expression for NAND
    LEDR(4) <= TODO_NOR;         -- TODO: expression for NOR
    LEDR(5) <= TODO_XOR;         -- TODO: expression for XOR
    LEDR(9 downto 6) <= (others => '0');  -- unused LEDs off
end architecture rtl;

Before you run it, work out the initial LED pattern yourself. With both switches down, A=0 and B=0 — find that row in the truth table above and decide, for each of the six gates, whether its output is 1. You will check your prediction against the live board in the next step.

Now build the circuit on the real board and check it against the truth table.

Upload your evidence. Capture a camera screenshot with both switches up (SW = 11) — LEDR0 (AND) and LEDR1 (OR) lit, the others off — and attach it in the response box below.