- Altera DE1-SoC
- 55 min
- Undergraduate, introductory
- English
Digital Logic on the DE1-SoC with VHDL (3/6): Memory -- flip-flops and registers
Students use VHDL clocked processes to build a D flip-flop and an 8-bit register, then verify memory behavior on real hardware.
- Explain why sequential logic needs memory while combinational logic does not.
- Describe a D flip-flop as sample-and-hold on the clock edge, with synchronous reset.
Includes student questions and response prompts.