- Altera DE1-SoC
- 50 min
- Undergraduate, introductory
- English
Digital Logic on the DE1-SoC with VHDL (1/6): Your first gates on real hardware
Students write VHDL for basic logic gates, synthesize and upload to the DE1-SoC, and verify truth tables on real switches and LEDs.
- Explain that VHDL describes hardware, not a program that runs step by step.
- Use the LabsLand DE1-SoC VHDL workflow: edit, Synthesize, Upload, observe.
Includes student questions and response prompts.