Nios V for DE1-SoC 35 min Undergraduate CS/CE English Nios V on DE1-SoC (1/5): First run Students open Nios V CodeIDE on the DE1-SoC, run the prebuilt hello.elf program, and record JTAG UART terminal evidence from the real board. Run a prebuilt ELF on the fixed DE1-SoC Nios V system. Identify Nios V as a RISC-V soft-core CPU implemented inside the FPGA. Includes student questions and response prompts. Preview lesson Sign in to create a class session
Nios V for DE1-SoC 55 min Undergraduate CS/CE English Nios V on DE1-SoC (2/5): C memory-mapped I/O Students edit C memory-mapped I/O on a Nios V system, read switches, control LEDs, and explain how addresses connect code to hardware. Use volatile C pointers to access memory-mapped I/O. Read LabsLand Nios V logical switches through the JP1 GPIO path. Includes student questions and response prompts. Preview lesson Sign in to create a class session
Nios V for DE1-SoC 55 min Undergraduate CS/CE English Nios V on DE1-SoC (3/5): RISC-V assembly I/O Students modify RISC-V assembly I/O, trace load and store instructions, and test switch-to-LED behavior on the DE1-SoC. Build and run a RISC-V assembly ELF for Nios V. Map load, store, shift, mask, and branch instructions to C behavior. Includes student questions and response prompts. Preview lesson Sign in to create a class session
Nios V for DE1-SoC 75 min Undergraduate CS/CE English Nios V on DE1-SoC (4/5): HEX display and timer Students build and upload Nios V C examples for HEX0 and the interval timer, then observe HEX0 and LEDR0 behavior on DE1-SoC hardware. Use validated memory-mapped display and timer peripherals in the fixed Nios V system. Explain why seven-segment displays need encoded segment patterns. Includes student questions and response prompts. Preview lesson Sign in to create a class session
Nios V for DE1-SoC 50 min Undergraduate CS/CE English Nios V on DE1-SoC (5/5): Tiny embedded hardware UI Students design a tiny embedded hardware UI on Nios V, combining inputs, LEDs, HEX output, submitted code, and live hardware-test evidence. Design a small embedded behavior using memory-mapped I/O. Choose C or RISC-V assembly based on implementation tradeoffs. Includes student questions and response prompts. Preview lesson Sign in to create a class session
