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Teach lesson

Nios V on DE1-SoC (3/5): RISC-V assembly I/O

Students modify RISC-V assembly I/O, trace load and store instructions, and test switch-to-LED behavior on the DE1-SoC.

  • Nios V for DE1-SoC
  • 55 min
  • Undergraduate CS/CE
  • English
  • Digital systems & FPGA ยท Embedded systems
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Nios V for DE1-SoC
Nios V for DE1-SoC

Learning Outcomes

  • Build and run a RISC-V assembly ELF for Nios V.

  • Map load, store, shift, mask, and branch instructions to C behavior.

  • Explain the role of temporary registers in a polling loop.

  • Validate assembly behavior on the real DE1-SoC board.

Student activity preview

Activity Content

Preview only. In a class session, students can fill in responses and submit their work to the teacher.

1

Same hardware, lower-level code

6 min

In the previous lesson, C code read JP1 data, shifted and masked the NSW0..NSW9 value, and wrote the result to the LED register. This lesson implements the same loop directly in RISC-V assembly.

You do not need to know the full RISC-V ISA for this workshop. Use this mini-reference while you read the starter:

- t0..t6: temporary registers used to hold addresses, input values, masks, and output values.
- zero: a register that always reads as 0.
- li rd, value: put a constant value into register rd. In this lesson it loads hardware addresses such as 0xFF200000 and masks such as 0x3FF.
- lw rd, offset(rs1): load one 32-bit word from memory into rd. Here it reads a hardware register.
- sw rs2, offset(rs1): store one 32-bit word from rs2 to memory. Here it writes to a hardware register.
- srli rd, rs1, amount: shift the bits in rs1 right by a fixed amount and put the result in rd.
- and rd, rs1, rs2: keep only the bits that are 1 in both source registers.
- j label: jump back to a label, which keeps the polling loop running.

For a complete instruction-set reference, use the official RISC-V Unprivileged ISA specification. For the Nios V system and memory-mapped peripherals, use the FPGAcademy DE1-SoC Computer with Nios V manual. For this activity, the mini-reference above, the address notes from Lesson 2, and the code comments below are enough.

RISC-V assembly polling loop showing JP1 input loaded, shifted, masked, written to LEDR, and repeated

The assembly starter repeats one evidence loop: load JP1 data, shift NSW bits down, mask the ten switch bits, store the result to LEDR, and jump back to poll again.

Using the mini-reference, explain why this loop needs a load, a store, a shift, a mask, and a jump. Do not worry about exact syntax yet.

2

Run the assembly starter

12 min

  1. Open Nios V Assembly IDE for DE1-SoC.

  2. Inspect main.s.

  3. Click Build ELF.

  4. Upload to the FPGA.

  5. Toggle NSW0, NSW5, and NSW9.

  6. Observe whether the matching red LEDs change.

Use the table to record three starter tests from the lab. Fill one row per switch pattern and write what the board actually showed.

Record three switch-to-LED tests from the assembly starter. Use the prefilled switch patterns or replace them with equivalent tests you actually ran.

Input tested Observed LEDR on board Notes
3

Trace the loop

13 min

The starter has this structure:

li   t0, 0xFF200000      # LEDR
li   t1, 0xFF200060      # JP1 GPIO data
li   t2, 0xFF200064      # JP1 GPIO direction
sw   zero, 0(t2)         # use JP1 GPIO lines as inputs
loop:
    lw   t3, 0(t1)
    srli t3, t3, 5
    li   t4, 0x3FF
    and  t3, t3, t4
    sw   t3, 0(t0)
    j    loop

Use the mini-reference and code comments to fill the register table. Each row should explain what that register holds during the loop. Register t3 is the transformed data register: it starts as the loaded JP1 input value, then becomes the shifted and masked value that is written to the LEDs.

For each temporary register, state what it holds in this program and classify that value as an address, input value, mask, output value, or transformed input/output value.

Register Role in the program Value kind

Which instruction reads the switch GPIO value, and which instruction writes to the LEDs?

Why does the final j loop instruction matter for live switch control?

4

Connect C and assembly

12 min

Map this C expression to assembly instructions: (*JP1 >> 5) & 0x3FF. Which assembly line reads the register value? Which line performs the shift? Which line creates the mask? Which line applies it?

Name two operations the C expression hides that you wrote explicitly in assembly. Then name one thing assembly makes harder to read or maintain.

5

Small assembly modification

12 min

Modify the assembly so only NSW0..NSW3 are shown on LEDs. Hint: the mask changes from ten bits to four bits.

Submit the changed assembly lines and explain which value you changed.

Describe one test where a switch above NSW3 was on. What should the LEDs show after your mask change?